Job Description
Job Title
Hardware Design Verification Engineer - San Diego
Job Area
Engineering - Hardware
Location
California - San Diego
Job Function
As a Functional Verification Engineer, you will be responsible for understanding the expected functionality of designs, developing corresponding testplans, designing and developing components of our verification environment, and applying these to verify complex designs until coverage goals are achieved in order to insure the continued commercial success of our high-quality products. Designs we verify include multimedia, modem, bus, DMA, various peripherals, security, memory controllers and RISC/DSP processors.
Skills/Experience
-Strong critical thinking, problem solving and test planning skills.
-General knowledge in ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc.
-Familiar with the design and assertion languages: RTL , System Verilog, System Verilog Assertions (SVA), Vera, e-Specman, VHDL, Verilog, PSL, etc.
-Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion) is a plus.
-Knowledge of wireless/wired communications and protocols or graphics/video multi-media is helpful, as are good written and oral communications skills.
Responsibilities
As verification is a rapidly changing field and consumes the majority of the design process, developing and deploying new verification methodologies is an essential part of the work you will do. Assertions, simulation, formal verification, HW-SW co-verification and constraint/HVL-based verification are all tools in our verification toolbox you will use on a daily basis.
Education Requirements
Required: Bachelor's, Electrical Engineering
Preferred: Master's, Electrical Engineering
Skills required
Candidates with H1/TN Visa can also apply.
Job Title
Hardware Design Verification Engineer - San Diego
Job Area
Engineering - Hardware
Location
California - San Diego
Job Function
As a Functional Verification Engineer, you will be responsible for understanding the expected functionality of designs, developing corresponding testplans, designing and developing components of our verification environment, and applying these to verify complex designs until coverage goals are achieved in order to insure the continued commercial success of our high-quality products. Designs we verify include multimedia, modem, bus, DMA, various peripherals, security, memory controllers and RISC/DSP processors.
Skills/Experience
-Strong critical thinking, problem solving and test planning skills.
-General knowledge in ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc.
-Familiar with the design and assertion languages: RTL , System Verilog, System Verilog Assertions (SVA), Vera, e-Specman, VHDL, Verilog, PSL, etc.
-Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion) is a plus.
-Knowledge of wireless/wired communications and protocols or graphics/video multi-media is helpful, as are good written and oral communications skills.
Responsibilities
As verification is a rapidly changing field and consumes the majority of the design process, developing and deploying new verification methodologies is an essential part of the work you will do. Assertions, simulation, formal verification, HW-SW co-verification and constraint/HVL-based verification are all tools in our verification toolbox you will use on a daily basis.
Education Requirements
Required: Bachelor's, Electrical Engineering
Preferred: Master's, Electrical Engineering
Experience Required
6 - 11 Years
Country
City
California
Company/Employer
Varmuk Soft Solutions